The document "I/O Model Reference for Smart Transceivers and Neuron Chips", page 64, figure 22 lists IO11 as an input, but I expected IO11 (IRQ) to be an output.
Figure 22 in "I/O Model Reference for Smart Transceivers and Neuron Chips" has an error and IO11 should be shown as an output.
The master uses the IRQ pin to receive an indication from the FT 5000 Smart Transceiver that the network is ready, either for uplink or for downlink.
The downlink ready interrupt allows the FT 5000 Smart Transceiver to inform the host when it has read the first byte of the transfer. This interrupt accounts for the latency of the parallel interface, that is, between a host write for a downlink transfer and the FT 5000 Smart Transceiver read for the transfer. This latency scales with the system clock and could be longer if the FT 5000 is busy processing an incoming network frame. The master initiates a downlink transfer by writing only the length byte; it then lets the interrupt service routine handle the rest of the transfer.
The uplink ready interrupt is an indication from the FT 5000 Smart Transceiver that uplink traffic needs to be transferred. The IRQ pin is asserted only when the FT 5000 Smart Transceiver does not own the write token.
The IRQ pin is deasserted during the downlink activity.
Although there are two interrupt cases, there is only a single interrupt request line. The interrupt type is determined by the master based on the state of the FT 5000 Smart Transceiver and token ownership.
- FT 5000
- Neuron 5000